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? 1 ? e01x50b24-ps sony reserves the right to change products and specifications without prior notice. this information does not convey any licens e by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illustr ating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits. ICX274AL 20 pin dip (plastic) description the ICX274AL is a diagonal 8.923mm (type 1/1.8) interline ccd solid-state image sensor with a square pixel array and 2.01m effective pixels. progressive scan allows all pixels' signals to be output independently within approximately 1/15 second, and output is also possible using various addition and pulse elimination methods. this chip features an electronic shutter with variable charge-storage time which makes it possible to realize full-frame still images without a mechanical shutter. further, high sensitivity and low dark current are achieved through the adoption of super had ccd technology. this chip is suitable for image input applications such as still cameras which require high resolution, etc. features ? high horizontal and vertical resolution supports the following modes progressive scan mode (with/without mechanical shutter) 2/8-line readout mode 2/4-line readout mode 2-line addition mode center scan modes (1), (2) and (3) af modes (1) and (2) square pixel horizontal drive frequency: 28.6364mhz (typ.), 36.0mhz (max.) reset gate bias are not adjusted high sensitivity, low dark current continuous variable-speed shutter function excellent anti-blooming characteristics 20-pin high-precision plastic package device structure interline ccd image sensor image size: diagonal 8.923mm (type 1/1.8) total number of pixels: 1688 (h) 1248 (v) approx. 2.11m pixels number of effective pixels: 1628 (h) 1236 (v) approx. 2.01m pixels number of active pixels: 1620 (h) 1220 (v) approx. 1.98m pixels recommended number of recording pixels: 1600 (h) 1200 (v) approx. 1.92m pixels chip size: 8.50mm (h) 6.80mm (v) unit cell size: 4.40m (h) 4.40m (v) optical black: horizontal (h) direction: front 12 pixels, rear 48 pixels vertical (v) direction: front 10 pixels, rear 2 pixels number of dummy bits: horizontal 28 vertical 1 substrate material: silicon optical black position (top view) 2 10 v h pin 1 pin 11 48 12 diagonal 8.923mm (type 1/1.8) progressive scan ccd image sensor with square pixel for b/w video cameras
? 2 ? ICX274AL 11 12 13 14 15 16 17 18 19 20 horizontal register note) v dd rg h 2b h 1b gnd sub c sub v l h 1a h 2a 10 9 8 7 6 5 4 3 2 1 v out gnd v 1 v 2c v 2b v 2a v 3c v 3b v 3a v 4 vertical register note) : photo sensor block diagram and pin configuration (top view) pin description ? 1 dc bias is generated within the ccd, so that this pin should be grounded externally through a capacitance of 0.1f. pin no. symbol description pin no. symbol description 1 2 3 4 5 6 7 8 9 10 v 4 v 3a v 3b v 3c v 2a v 2b v 2c v 1 gnd v out vertical register transfer clock vertical register transfer clock vertical register transfer clock vertical register transfer clock vertical register transfer clock vertical register transfer clock vertical register transfer clock vertical register transfer clock gnd signal output 11 12 13 14 15 16 17 18 19 20 v dd rg h 2b h 1b gnd sub c sub v l h 1a h 2a supply voltage reset gate clock horizontal register transfer clock horizontal register transfer clock gnd substrate clock substrate bias ? 1 protective transistor bias horizontal register transfer clock horizontal register transfer clock
? 3 ? ICX274AL absolute maximum ratings ? 2 +24v (max.) is guaranteed when clock width < 10s, clock duty factor < 0.1%. +16v (max.) is guaranteed during power-on or power-off. item v dd , v out , rg ? sub v 2 , v 3 ? sub ( = a to c) v 1 , v 4 , v l ? sub h 1 , h 2 , gnd ? sub ( = a, b) c sub ? sub v dd , v out , rg, c sub ? gnd v 1 , v 2 , v 3 , v 4 ? gnd ( = a to c) h 1 , h 2 ? gnd ( = a, b) v 2 , v 3 ? v l ( = a to c) v 1 , v 4 , h 1 , h 2 , gnd ? v l ( = a, b) voltage difference between vertical clock input pins h 1 ? h 2 ( = a, b) h 1 , h 2 ? v 4 ( = a, b) against sub against gnd against v l between input clock pins storage temperature guaranteed temperature of performance operating temperature ? 40 to +12 ? 50 to +15 ? 50 to +0.3 ? 40 to +0.3 ? 25 to ? 0.3 to +22 ? 10 to +18 ? 10 to +6.5 ? 0.3 to +28 ? 0.3 to +15 to +15 ? 6.5 to +6.5 ? 10 to +16 ? 30 to +80 ? 10 to +60 ? 10 to +75 v v v v v v v v v v v v v c c c ? 2 ratings unit remarks
? 4 ? ICX274AL bias conditions ? 1 progressive scan mode, 2/8-line readout mode, 2/4-line readout mode, center scan modes (1) and (3), and af modes (1) and (2) ? 2 2-line addition mode and center scan mode (2) ? 3 v l setting is the v vl voltage of the vertical clock waveform, or the same voltage as the v l power supply for the v driver should be used. ? 4 substrate voltage (v sub2 ) setting value indication the substrate voltage (v sub ) for modes without line addition is generated internally. the substrate voltage setting value for use with vertical 2-line addition is indicated by a code on the bottom surface of the image sensor. adjust the substrate voltage to the indicated voltage. v sub2 code ? 1-digit indication v sub2 code the code and the actual value correspond as follows. [example] "h" indicates a v sub2 setting of 11.6v. ? 5 do not apply a dc bias to the reset gate clock pin, because a dc bias is generated within the ccd. dc characteristics supply current item i dd symbol 10.0 min. unit remarks typ. max. ma 13.0 7.0 j 11.8 k 12.0 l 12.2 m 12.4 n 12.6 p 12.8 r 13.0 s 13.2 u 13.4 v 13.6 w 13.8 x 14.0 y 14.2 z 14.4 v sub2 code actual value 1 8.8 2 9.0 3 9.2 4 9.4 6 9.6 7 9.8 8 10.0 9 10.2 a 10.4 c 10.6 d 10.8 e 11.0 f 11.2 g 11.4 h 11.6 v sub2 code actual value supply voltage protective transistor bias substrate voltage adjustment range substrate voltage adjustment accuracy reset gate clock item v dd v l v sub v sub2 ? v sub rg symbol 15.0 ? 3 internally generated value indicated voltage ? 5 min. v v v v unit ? 4 remarks typ. max. no line addition ? 1 2-line addition ? 2 14.55 8.8 indicated voltage ? 0.2 15.45 14.4 indicated voltage + 0.2
? 5 ? ICX274AL clock voltage conditions readout clock voltage vertical transfer clock voltage horizontal transfer clock voltage reset gate clock voltage substrate clock voltage item v vt v vh1 , v vh2 v vh3 , v vh4 v vl1 , v vl2 , v vl3 , v vl4 v v v vh3 ? v vh v vh4 ? v vh v vhh v vhl v vlh v vll v h v hl v cr v rg v rglh ? v rgll v rgl ? v rglm v sub symbol 14.55 ? 0.05 ? 0.2 ? 8.0 6.8 ? 0.25 ? 0.25 4.75 ? 0.05 0.8 3.0 21.5 min. 15.0 0 0 ? 7.5 7.5 5.0 0 2.5 3.3 22.5 ty p. 15.45 0.05 0.05 ? 7.0 8.05 0.1 0.1 0.5 0.5 0.5 0.5 5.25 0.05 5.25 0.4 0.5 23.5 max. unit 1 2 2 2 2 2 2 2 2 2 2 3 3 3 4 4 4 5 waveform diagram v vh = (v vh1 + v vh2 )/2 v vl = (v vl3 + v vl4 )/2 v v = v vh n ? v vl n (n = 1 to 4) high-level coupling high-level coupling low-level coupling low-level coupling cross-point voltage low-level coupling low-level coupling remarks v v v v v v v v v v v v v v v v v v
? 6 ? ICX274AL clock equivalent circuit constants note 1) expressions using parentheses such as c v2 (a,b), 3c indicate items which include all combinations of the pins within the parentheses. for example, c v2 (a, b), 3c indicates [c v2a3c , c v2b3c ]. c v1 c v2a , c v2b c v2c c v3a , c v3b c v3c c v4 c v12 (a, b) c v12c c v13 (a, b) c v13c c v14 c v2 (a, b), 3 (a, b) c v2 (a, b), 3c c v2 (a, b), 4 c v2c, 3 (a, b) c v2c, 3c c v2c, 4 c v3 (a, b), 4 c v3c, 4 c h1 c h2 c hh c rg c sub r 1 , r 4 r 2 (a, b, c), 3 (a, b, c) r gnd r h r h2 r rg symbol capacitance between vertical transfer clock and gnd capacitance between vertical transfer clocks capacitance between horizontal transfer clock and gnd capacitance between horizontal transfer clocks capacitance between reset gate clock and gnd capacitance between substrate clock and gnd vertical transfer clock series resistor vertical transfer clock ground resistor horizontal transfer clock series resistor horizontal transfer clock ground resistor reset gate clock and series resistor item min. 3300 1200 2700 1000 1800 6800 120 220 150 270 2700 470 680 680 1000 820 1800 820 1500 100 100 47 2 820 30 62 15 7 20 4.7 typ. max. pf pf pf pf pf pf pf pf pf pf pf pf pf pf pf pf pf pf pf pf pf pf pf pf ? ? ? ? k ? ? unit remarks
? 7 ? ICX274AL horizontal transfer clock equivalent circuit reset gate clock equivalent circuit vertical transfer clock equivalent circuit note 2) c 2 2 and c 3 3 ( = a to c , = a to c other than ) are sufficiently small relative to other capacitance between other vertical clocks in the equivalent circuit, so these are omitted from the equivalent circuit diagram. v 4 v 1 v 2 ( = a to c) v 3 ( = a to c) c v2 4 ( = a to c) r gnd c v1 c v3 ( = a to c) c v4 c v2 ( = a to c) c v2 3 ( = a to c) c v3 4 ( = a to c) c v12 ( = a to c) c v13 ( = a to c) c v14 r 4 r 3 ( = a to c) r 1 r 2 ( = a to c) h 1b h 2b c h1 c h2 c hh r h r h2 r h h 1a h 2a r h r h rg r rg c rg
? 8 ? ICX274AL drive clock waveform conditions (1) readout clock waveform v vh = (v vh1 + v vh2 )/2 v vl = (v vl3 + v vl4 )/2 v v = v vh n ? v vl n (n = 1 to 4) (2) vertical transfer clock waveform 100% 90% 10% 0% tr tf 0v twh m 2 m v vt v vh1 v vhh v vhl v vh v vlh v vl1 v vll v vhl v vhh v vl v vh2 v vhh v vhh v vhl v vhl v vh v vlh v vl2 v vll v vl v vhh v vh v vlh v vll v vl v vhl v vl3 v vhl v vh3 v vhh v vh v vl v vhl v vlh v vll v vhl v vh4 v vhh v vhh v vl4 v 1 v 3a , v 3b , v 3c v 2a , v 2b , v 2c v 4
? 9 ? ICX274AL v hl v cr twl two twh v h v h 2 tr h 2 90% 10% h 1 tf rg waveform v rglh v rgh v rgl v rgll v rglm tr twh twl tf v rg point a v sub (internally generated bias) 100% 90% 10% 0% tr tf twh m 2 m v sub (3) horizontal transfer clock waveform cross-point voltage for the h 1 rising side of the horizontal transfer clocks h 1 and h 2 waveforms is v cr . the overlap period for twh and twl of horizontal transfer clocks h 1 and h 2 is two. ( = a, b ) (4) reset gate clock waveform v rglh is the maximum value and v rgll is the minimum value of the coupling waveform during the period from point a in the above diagram until the rising edge of rg. in addition, v rgl is the average value of v rglh and v rgll . v rgl = (v rglh + v rgll )/2 assuming v rgh is the minimum value during the interval twh, then: v rg = v rgh ? v rgl negative overshoot level during the falling edge of rg is v rglm . (5) substrate clock waveform
? 10 ? ICX274AL ? 1 when two vertical transfer clock drivers cxd3400n are used. ? 2 tf tr ? 2ns, and the cross-point voltage (v cr ) for the h 1 ( = a, b ) rising side of the h 1 and h 2 waveforms must be v h/2 [v] or more. clock switching characteristics (horizontal drive frequency: 28.6364mhz) min. twh typ. max. min. typ. max. min. typ. max. min. typ. max. twl tr tf 3.3 10 10 4 3.5 12.5 12.5 7 2.1 10 10 12.5 12.5 24 0.5 5 5 2 7.5 7.5 0.5 15 0.5 5 5 3 400 7.5 7.5 0.5 unit s ns ns ns s remarks during readout ? 1 ? 2 during drain charge item readout clock vertical transfer clock horizontal transfer clock reset gate clock substrate clock symbol v t v 1 , v 4 , v 2 , v 3 ( = a to c ) h 1 ( = a, b ) h 2 ( = a, b ) rg sub min. two typ. max. 810 unit ns remarks item horizontal transfer clock symbol h 1a , h 1b , h 2a , h 2b clock switching characteristics (horizontal drive frequency: 36mhz) min. twh typ. max. min. typ. max. min. typ. max. min. typ. max. twl tr tf 4.0 8 8 4 4.2 9 9 5.5 1.67 8 8 9 9 8 0.5 5 5 2 6 6 0.25 15 0.5 5 5 3 400 6 6 0.25 unit s ns ns ns s remarks during readout ? 1 ? 2 during drain charge item readout clock vertical transfer clock horizontal transfer clock reset gate clock substrate clock symbol v t v 1 , v 4 , v 2 , v 3 ( = a to c ) h 1 ( = a, b ) h 2 ( = a, b ) rg sub min. two typ. max. 89 unit ns remarks item horizontal transfer clock symbol h 1a , h 1b , h 2a , h 2b
? 11 ? ICX274AL spectral sensitivity characteristics (excludes lens characteristics and light source characteristics) wave length [nm] relative response 400 500 600 700 800 900 1000 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 ? 1 vsat2 is the saturation signal level in 2-line addition mode, and is 200mv per pixel. ? 2 progressive scan mode, 2/8-line readout mode, 2/4-line readout mode, and center scan modes (1) and (3). ? 3 2-line addition mode and center scan mode (2). ? 4 same for 2-line addition mode and center scan modes (2) and (3). ? 5 same for center scan mode (1). ? 6 same for af modes (1) and (2). ? 7 excludes vertical dark signal shading caused by vertical register high-speed transfer. image sensor characteristics (ta = 25 c) item sensitivity saturation signal smear video signal shading dark signal dark signal shading lag symbol s vsat vsat2 ? 1 sm sh vdt ? vdt lag min. 335 400 400 ty p. 420 ? 100 ? 94 ? 88 max. 545 ? 92 ? 86 ? 80 20 25 8 2 0.5 unit mv mv db % mv mv % measurement method 1 2 3 4 5 6 7 remarks 1/30s accumulation ta = 60 c progressive scan mode ? 4 2/4-line readout mode ? 5 2/8-line readout mode ? 6 zone 0 and i zone 0 to ii ? ta = 60 c, 14.985 frame/s ta = 60 c, 14.985 frame/s, ? 7 no line addition ? 2 2-line addition ? 3
? 12 ? ICX274AL 4 v 10 4 8 8 ignored region effective pixel region zone 0, i zone ii , ii ? v 10 h 8 h 8 1628 (h) 1236 (v) zone definition of video signal shading measurement system note) adjust the amp gain so that the gain between [ ? a] and [ ? b] equals 1. ccd c.d.s s/h amp ccd signal output [ ? a] signal output [ ? b]
? 13 ? ICX274AL note) blacked out portions in the diagram indicate pixels which are not read out. output starts from line 1 in 2/8-line decimation mode. 1. progressive scan mode in this mode, all pixel signals are output in non-interlace format in 1/14.985s. all pixel signals within the same exposure period are read out simultaneously, making this mode suitable for high resolution image capturing. 2. 2/8-line readout mode all effective area signals are output in approximately 1/30s by reading out the signals for only two out of eight lines (1st and 6th lines, 9th and 14th lines). this readout mode emphasizes processing speed over vertical resolution, making it suitable for ae/af and other control and for checking images on lcd viewfinders. 3. 2/4-line readout mode all effective area signals are output in approximately 1/20s by reading out the signals for only two out of four lines (3rd and 4th lines, 7th and 8th lines, and so on). readout modes the diagrams below and on the following pages show the output methods for the following nine readout modes. 2/4-line readout mode progressive scan mode 2/8-line readout mode 16 (v2c/v3c) 15 (v2c/v3c) 14 (v2a/v3a) 13 (v2b/v3b) 12 (v2c/v3c) 11 (v2c/v3c) 10 (v2b/v3b) 9 (v2a/v3a) 8 (v2c/v3c) 7 (v2c/v3c) 6 (v2a/v3a) 5 (v2b/v3b) 4 (v2c/v3c) 3 (v2c/v3c) 2 (v2b/v3b) 1 (v2a/v3a) v out 16 (v2c/v3c) 15 (v2c/v3c) 14 (v2a/v3a) 13 (v2b/v3b) 12 (v2c/v3c) 11 (v2c/v3c) 10 (v2b/v3b) 9 (v2a/v3a) 8 (v2c/v3c) 7 (v2c/v3c) 6 (v2a/v3a) 5 (v2b/v3b) 4 (v2c/v3c) 3 (v2c/v3c) 2 (v2b/v3b) 1 (v2a/v3a) v out 16 (v2c/v3c) 15 (v2c/v3c) 14 (v2a/v3a) 13 (v2b/v3b) 12 (v2c/v3c) 11 (v2c/v3c) 10 (v2b/v3b) 9 (v2a/v3a) 8 (v2c/v3c) 7 (v2c/v3c) 6 (v2a/v3a) 5 (v2b/v3b) 4 (v2c/v3c) 3 (v2c/v3c) 2 (v2b/v3b) 1 (v2a/v3a) v out
? 14 ? ICX274AL note) blacked out portions in the diagram indicate pixels which are not read out. after reading out the pixels indicated by and transferring two lines, the pixels indicated by are read out and two pixels of the same color are added by the vertical transfer block. 4. 2-line addition mode in this mode, the signals for only two out of four lines (3rd and 4th lines, 7th and 8th lines, and so on) are read out, the vertical register is shifted by 2 bits, and then the signals of the remaining two out of the four lines (1st and 2nd lines, 5th and 6th lines, and so on) are read out and added within the vertical register. all effective area signals are output in approximately 1/20s. 5. center scan mode (1) in this mode, the signals for only two out of four lines (3rd and 4th lines, 7th and 8th lines, and so on) are read out. the undesired portions are swept by vertical register high-speed transfer, and the vertical 1136-pixel region in the center of the picture is output by the above readout method. the number of output lines is 568 lines at 36mhz, and 434 lines at 28.6364mhz. the frame rate is increased (approximately 30 frames/s) by setting the number of output lines to that of vga mode, making this mode suitable for vga moving pictures. (however, the angle of view decreases.) 6. center scan mode (2) in this mode, the signals for only two out of four lines (3rd and 4th lines, 7th and 8th lines, and so on) are read out, the vertical register is shifted by 2 bits, and then the signals of the remaining two out of the four lines (1st and 2nd lines, 5th and 6th lines, and so on) are read out and added within the vertical register. the undesired portions are swept by vertical register high-speed transfer, and the vertical 1136-pixel region in the center of the picture is output by the above readout method. the number of output lines is 568 lines at 36mhz, and 434 lines at 28.6364mhz. the frame rate is increased (approximately 30 frames/s) by setting the number of output lines to that of vga mode, making this mode suitable for vga moving pictures. (however, the angle of view decreases.) center scan mode (2) 2-line addition mode center scan mode (1) 16 (v2c/v3c) 15 (v2c/v3c) 14 (v2a/v3a) 13 (v2b/v3b) 12 (v2c/v3c) 11 (v2c/v3c) 10 (v2b/v3b) 9 (v2a/v3a) 8 (v2c/v3c) 7 (v2c/v3c) 6 (v2a/v3a) 5 (v2b/v3b) 4 (v2c/v3c) 3 (v2c/v3c) 2 (v2b/v3b) 1 (v2a/v3a) v out 16 (v2c/v3c) 15 (v2c/v3c) 14 (v2a/v3a) 13 (v2b/v3b) 12 (v2c/v3c) 11 (v2c/v3c) 10 (v2b/v3b) 9 (v2a/v3a) 8 (v2c/v3c) 7 (v2c/v3c) 6 (v2a/v3a) 5 (v2b/v3b) 4 (v2c/v3c) 3 (v2c/v3c) 2 (v2b/v3b) 1 (v2a/v3a) v out 16 (v2c/v3c) 15 (v2c/v3c) 14 (v2a/v3a) 13 (v2b/v3b) 12 (v2c/v3c) 11 (v2c/v3c) 10 (v2b/v3b) 9 (v2a/v3a) 8 (v2c/v3c) 7 (v2c/v3c) 6 (v2a/v3a) 5 (v2b/v3b) 4 (v2c/v3c) 3 (v2c/v3c) 2 (v2b/v3b) 1 (v2a/v3a) v out
? 15 ? ICX274AL note) blacked out portions in the diagram indicate pixels which are not read out. 7. center scan mode (3) this is the center scan mode using the progressive scan method. the undesired portions are swept by vertical register high-speed transfer, and the picture center is cut out. the number of output lines is 580 lines at 36mhz, and 444 lines at 28.6364mhz. 8. af mode (1) in this mode, the undesired portions are swept by vertical register high-speed transfer, and the vertical 940-pixel region in the center of the picture is output in approximately 1/60s by reading out the signals for only two out of eight lines (1st and 6th lines, 9th and 14th lines). the number of output lines is 235 lines at 36mhz, and 170 lines at 28.6364mhz. this mode aims for even faster af control than 2/8-line readout mode. 9. af mode (2) in this mode, the undesired portions are swept by vertical register high-speed transfer, and the vertical 300-pixel region in the center of the picture is output in approximately 1/120s by reading out the signals for only two out of eight lines (1st and 6th lines, 9th and 14th lines). the number of output lines is 75 lines at 36mhz, and 43 lines at 28.6364mhz. this mode aims for even faster af control than 2/8-line readout mode. af mode (2) center scan mode (3) af mode (1) 16 (v2c/v3c) 15 (v2c/v3c) 14 (v2a/v3a) 13 (v2b/v3b) 12 (v2c/v3c) 11 (v2c/v3c) 10 (v2b/v3b) 9 (v2a/v3a) 8 (v2c/v3c) 7 (v2c/v3c) 6 (v2a/v3a) 5 (v2b/v3b) 4 (v2c/v3c) 3 (v2c/v3c) 2 (v2b/v3b) 1 (v2a/v3a) v out 16 (v2c/v3c) 15 (v2c/v3c) 14 (v2a/v3a) 13 (v2b/v3b) 12 (v2c/v3c) 11 (v2c/v3c) 10 (v2b/v3b) 9 (v2a/v3a) 8 (v2c/v3c) 7 (v2c/v3c) 6 (v2a/v3a) 5 (v2b/v3b) 4 (v2c/v3c) 3 (v2c/v3c) 2 (v2b/v3b) 1 (v2a/v3a) v out 16 (v2c/v3c) 15 (v2c/v3c) 14 (v2a/v3a) 13 (v2b/v3b) 12 (v2c/v3c) 11 (v2c/v3c) 10 (v2b/v3b) 9 (v2a/v3a) 8 (v2c/v3c) 7 (v2c/v3c) 6 (v2a/v3a) 5 (v2b/v3b) 4 (v2c/v3c) 3 (v2c/v3c) 2 (v2b/v3b) 1 (v2a/v3a) v out
? 16 ? ICX274AL center scan and af modes description of center scan and af mode operation the center scan and af modes realize high frame rates by sweeping the top and bottom of the picture with high-speed transfer and cutting out the center of the picture. the various readout modes during center scan and af operation are described below. af modes af mode (1), (2): the output method is the same as readout in 2/8-line readout mode. center scan modes center scan mode (1): the output method is the same as 2/4-line readout mode. center scan mode (2): the output method consists of 2-line addition readout whereby the signals for only two out of four lines (3rd and 4th lines, 7th and 8th lines, and so on) are read out, the vertical register is shifted by 2 bits, and then the signals of the remaining two out of the four lines (1st and 2nd lines, 5th and 6th lines, and so on) are read out and added within the vertical register. center scan mode (3): the output method is the same as progressive scan mode. the readout method, frame rate, number of output lines and other information for each readout mode are shown in the table below. undesired portions (swept by vertical register high-speed transfer) picture center cut-out portion mode frame rate (frame/s) progressive scan mode 2/8-line readout mode 2/4-line readout mode 2-line addition mode center scan mode (1) center scan mode (2) center scan mode (3) af mode (1) af mode (2) progressive scan 2/8-line readout 2/4-line readout 2/4-line readout 2/4-line readout 2-line addition readout progressive scan 2/8-line readout 2/8-line readout none none none vertical 2-line none vertical 2-line none none none 9.99 29.97 19.98 19.98 29.97 29.97 29.97 59.94 119.88 14.985 29.97 19.98 19.98 29.97 29.97 29.97 59.94 119.88 1220 305 610 1220 434 434 444 170 43 1220 305 610 1220 568 568 580 235 75 number of output effective pixel data lines readout method addition method 28.6mhz 36mhz 28.6mhz 36mhz
? 17 ? ICX274AL measurement conditions (1) in the following measurements, the device drive conditions are at the typical values of the bias and clock voltage conditions, and the progressive scan readout mode is used. (2) in the following measurements, spot blemishes are excluded and, unless otherwise specified, the optical black level (ob) is used as the reference for the signal output, which is taken as the value measured at point [*b] of the measurement system. definition of standard imaging conditions (1) standard imaging condition i : use a pattern box (luminance: 706cd/m 2 , color temperature of 3200k halogen source) as a subject. (pattern for evaluation is not applicable.) use a testing standard lens with cm500s (t = 1.0mm) as an ir cut filter and image at f8. the luminous intensity to the sensor receiving surface at this point is defined as the standard sensitivity testing luminous intensity. (2) standard imaging condition ii : image a light source (color temperature of 3200k) with a uniformity of brightness within 2% at all angles. use a testing standard lens with cm500s (t = 1.0mm) as an ir cut filter. the luminous intensity is adjusted to the value indicated in each testing item by the lens diaphragm. 1. sensitivity set to the standard imaging condition i . after selecting the electronic shutter mode with a shutter speed of 1/100s, measure the signal output (v s ) at the center of the screen, and substitute the values into the following formulas. s = v s [mv] 2. saturation signal set to the standard imaging condition ii . after adjusting the luminous intensity to 10 times the intensity with the average value of the g chanel signal output, 150mv, measure the minimum values of the signal outputs. 3. smear set to standard imaging condition ii . with the lens diaphragm at f5.6 to f8, adjust the luminous intensity to 500 times the intensity with the average value of the signal output, 150mv. after the readout clock is stopped and the charge drain is executed by the electronic shutter at the respective h blankings, measure the maximum value (vsm [mv]) of the signal outputs, and substitute the values into the following formula. smear in modes other than progressive scan mode is calculated from the storage time and signal addition method. as a result, 2-line addition mode and center scan modes (2) and (3) are the same as progressive scan mode, 2/4-line readout mode and center scan mode (1) are two times progressive scan mode, and 2/8-line readout mode and af modes (1) and (2) are four times progressive scan mode. sm = 20 log [db] (1/10 v method conversion value) 100 30 vsm 200 1 10 1 500
? 18 ? ICX274AL 4. video signal shading set to the standard imaging condition ii . with the lens diaphragm at f5.6 to f8, adjusting the luminous intensity so that the average value of the signal output is 150mv. then measure the maximum value (vmax [mv]) and minimum value (vmin [mv]) of the g signal output and substitute the values into the following formula. sh = (vmax ? vmin)/150 100 [%] 5. dark signal measure the average value of the signal output (vdt [mv]) with the device ambient temperature of 60 c and the device in the light-obstructed state, using the horizontal idle transfer level as a reference. 6. dark signal shading after measuring 5, measure the maximum (vdmax [mv]) and minimum (vdmin [mv]) values of the dark signal output and substitute the values into the following formula. ? vdt = vdmax ? vdmin [mv] 7. lag adjust the signal output generated by the strobe light to 150mv. after setting the strobe light so that it strobes with the following timing, measure the residual signal amount (vlag). substitute the value into the following formula. lag = (vlag/150) 100 [%] vd light output strobe light timing vlag (lag) signal output 150mv
? 19 ? ICX274AL drive circuit 3.3v xv3 15v xsg3c xv2 xsg2c xsub xv3 xsg3b xsg3a xv2 xsg2b xsg2a xv4 xv1 h 1a h 2a h 1b h 2b rg vsub ccd out ? 7.5v 0.1 0.1 0.1 0.1 0.1 0.1 0.01 0.1 2200p 3.3/16v 3.3/20v 0.1 0.1 1/35v 100k 1m 4.7k 2sc4250 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 icx274 (bottom view) v 4 v 3a v 3b v 3c v 2a v 2b v 2c v 1 gnd v out h 2a h 1a v l c sub sub gnd h 1b h 2b rg v dd 11 12 13 14 15 16 17 18 19 20 10 9 8 7 6 5 4 3 2 1 cxd3400n 11 12 13 14 15 16 17 18 19 20 10 9 8 7 6 5 4 3 2 1 cxd3400n dcin gnd v sub2 v sub 2-line addition mode center scan mode (2) substrate bias adjustment input voltage (vsub in the circuit diagram above) substrate bias sub pin voltage modes other than the above (internally generated value) note) substrate bias control switch the substrate bias adjustment input voltage to dcin before adjusting the substrate bias in 2-line addition mode and center scan mode (2).
? 20 ? ICX274AL drive timing chart (vertical sync) progressive scan mode note) the 1252h horizontal period at 36mhz is 480clk; the 1493h horizontal period at 28mhz is 1860clk. hd v1 vd v2 v4 v3 1249 1250 1251 1252 1492 "a" "a" 1493 1 2 3 4 5 6 7 8 9 10 11 12 13 14 1249 1250 1251 1252 1492 1493 1 2 3 4 5 6 7 8 9 10 11 12 13 14 1235 1236 1 2 3 4 5 6 7 8 9 10 1 2 3 4 5 6 7 8 9 10 1236 1235 1 2 3 4 5 6 7 8 9 10 1 2 3 4 5 6 7 8 9 10 1236 36mhz 28.6mhz 28.6mhz 36mhz ccd out
? 21 ? ICX274AL drive timing chart (horizontal sync) progressive scan mode rg clk shp shd h1a/h1b h2a/h2b 1 1920 1521 112 128 204 296 14 v1 v2a/v2b/v2c v3a/v3b/v3c v4 sub 1 90 18 1 54 1 54 1 154 1 90 1 36 1 9 1 78 114 96 132 60 135 1 1 1 1 1
? 22 ? ICX274AL drive timing chart (vertical sync) progressive scan mode "a" enlarged h1a/h1b v1 v2a/v2b/v2c v3a/v3b/v3c v4 18 18 18 18 18 18 18 18 60 18 18 18 18 18 1100 1250
? 23 ? ICX274AL drive timing chart (vertical sync) progressive scan mode (with mechanical shutter) ccd out 1 2 3 4 5 6 7 8 9 10 1 2 3 4 5 6 7 8 9 10 1235 1236 trg sub mechanical shutter close open v2a/v2b/v2c v4 hd 1 2 3 4 5 6 7 8 9 10 11 70 72 1321 1564 1565 1742 1 v3a/v3b/v3c v1 "b" "a" vd 28.6mhz 36mhz note) the 1564 and 1565h horizontal periods at 36mhz are 1021clk; the 1742h horizontal period at 28mhz is 1530clk.
? 24 ? ICX274AL drive timing chart (vertical sync) progressive scan mode (with mechanical shutter) "b" enlarged h1a/h1b 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 60 #2 #1 #3 #1865 134400 bits 1 v1 v2c v2a/v2b v3c v3a/v3b v4
? 25 ? ICX274AL note) the 511h horizontal period at 36mhz is 1680clk; the 406 and 407h horizontal periods at 28mhz are 1470clk. drive timing chart (vertical sync) 2/8-line readout mode hd v1 vd v2a v2b/v2c v4 v3a v3b/v3c "a" "a" 511 510 407 406 312 311 1 2 3 4 5 6 7 8 9 10 11 12 13 14 511 510 406 407 311 312 1 2 3 4 5 6 7 8 9 10 11 12 13 14 8 3 1 6 9 14 17 22 25 30 33 38 41 46 1230 1225 1233 1225 8 3 1 6 9 14 17 22 25 30 33 38 41 46 1230 1233 36mhz 28.6mhz 28.6mhz 36mhz ccd out
? 26 ? ICX274AL drive timing chart (horizontal sync) 2/8-line readout mode rg v1 v2a v2b/v2c v3a v3b/v3c v4 sub clk shp shd h1a/h1b h2a/h2b 154 1 1 190 18 1 90 1 90 1 72 54 154 154 1 60 154 1 1 54 1 54 1 54 1 54 90 190 19011 60 36 154 1 1 54 1 54 1 54 1 54 90 190 19011 60 36 190 1 154154154154 90 190 190 1 60 190 1 154154154154 90 190 190 1 60 190 1 154 1 1 36 1 54 1 54 1 118 90 190 190 60 1 19 60 567 1 2352 1521 112 128 636 728 14
? 27 ? ICX274AL drive timing chart (vertical sync) 2/8-line readout mode "a" enlarged h1a/h1b v1 v2a v2b/v2c v3a v3b/v3c v4 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 42 1100 1250 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 60 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18
? 28 ? ICX274AL drive timing chart (vertical sync) 2/4-line readout mode note) the 871h horizontal period at 36mhz is 900clk; the 693h horizontal period at 28mhz is 810clk. hd v1 vd v2c v2a/v2b v4 v3c v3a/v3b 871 693 625 1 2 3 4 5 6 7 8 9 10 871 693 652 1 2 3 4 5 6 7 8 9 10 6 5 9 10 3 4 7 8 1232 1231 1235 1236 1231 6 5 9 10 3 4 7 8 1232 1235 1236 36mhz 28.6mhz 28.6mhz 36mhz ccd out "a" "a"
? 29 ? ICX274AL drive timing chart (horizontal sync) 2/4-line readout mode rg clk shp shd h1a/h1b h2a/h2b 1 2070 1521 112 128 354 446 14 v1 v2a/v2b/v2c v3a/v3b/v3c v4 sub 154 1 90 1 54 18 1 1 1 1 1 1 54 90 1 1 54 138 54 1 154 154 90 1 102 1901 154 1 36 1 84 120 90 1 1 12 60 282
? 30 ? ICX274AL drive timing chart (vertical sync) 2/4-line readout mode "a" enlarged h1a/h1b v1 v2c v2a/v2b v3c v3a/v3b v4 18 54 18 18 18 18 18 18 18 18 18 18 18 18 18 18 54 150 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 66 600 750
? 31 ? ICX274AL drive timing chart (vertical sync) 2-line addition mode hd v1 vd v2c v2a/v2b v4 v3c v3a/v3b "a" "a" 871 693 625 1 2 3 4 5 6 7 8 9 10 871 693 625 1 2 3 4 5 6 7 8 9 10 4 3 7 8 1 2 5 6 6 5 9 10 3 4 7 8 1230 1229 1233 1234 1 2 1232 1231 1235 1236 1229 4 3 7 8 1 2 5 6 6 5 9 10 3 4 7 8 1230 1233 1234 1 2 1231 1232 1235 1236 36mhz 28.6mhz 28.6mhz 36mhz ccd out note) the 871h horizontal period at 36mhz is 900clk; the 693h horizontal period at 28mhz is 810clk.
? 32 ? ICX274AL drive timing chart (horizontal sync) 2-line addition mode rg clk shp shd h1a/h1b h2a/h2b 1 2070 1521 112 128 354 446 14 v1 v2a/v2b/v2c v3a/v3b/v3c v4 sub 154 1 90 1 54 18 1 1 1 1 1 1 54 90 1 1 54 138 54 1 154 154 90 1 102 1901 154 1 36 1 84 120 90 1 1 12 60 282
? 33 ? ICX274AL drive timing chart (vertical sync) 2-line addition mode "a" enlarged h1a/h1b v1 v2c v2a/v2b v3c v3a/v3b v4 18 54 18 18 18 18 18 18 18 18 18 18 18 18 18 18 54 150 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 66 600 750
? 34 ? ICX274AL drive timing chart (vertical sync) center scan mode (1)/(28.6mhz) hd v1 vd v2c v2a/v2b v4 v3c v3a/v3b "d" "a" "b" "a" "b" "d" 462 461 459 458 460 452 451 453 450 1 2 3 4 5 6 7 8 9 10 15 17 462 461 459 460 453 451 452 450 1 2 3 4 5 6 7 8 9 10 15 17 188 191 192 195 1055 1052 1048 188 191 192 1051 1052 1055 ccd out note) the 462h horizontal period is 1230clk.
? 35 ? ICX274AL drive timing chart (vertical sync) center scan mode (1)/(36mhz) note) the 581h horizontal period is 601clk. hd v1 vd v2c v2a/v2b v4 v3c v3a/v3b "d" "a" "b" "a" "b" "d" 581 580 578 577 576 579 1 2 3 4 5 6 7 8 9 10 581 580 578 579 577 576 1 2 3 4 5 6 7 8 9 10 60 55 56 59 1188 1183 1187 1184 55 56 59 60 1183 1184 1187 1188 ccd out
? 36 ? ICX274AL drive timing chart (vertical sync) center scan mode (1) "a" enlarged h1a/h1b v1 v2c v2a/v2b v3c v3a/v3b v4 18 54 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 66 600 750
? 37 ? ICX274AL drive timing chart (vertical sync) center scan mode (1)/(28.6mhz) "b" enlarged h1a/h1b v1 v2c v2a/v2b v3c v3a/v3b v4 18 18 18 18 18 18 18 18 #5 #6 #187 18 18 18 18 18 18 18 18 27936 bits 28980 bits = 14h
? 38 ? ICX274AL drive timing chart (vertical sync) center scan mode (1)/(36mhz) "b" enlarged h1a/h1b v1 v2c v2a/v2b v3c v3a/v3b v4 18 18 18 18 18 18 18 18 #5 #6 #52 18 18 18 18 18 18 18 18 8784 bits 10350 bits = 5h
? 39 ? ICX274AL drive timing chart (vertical sync) center scan mode (2)/(28.6mhz) note) the 462h horizontal period is 1230clk. hd v1 vd v2c v2a/v2b v4 v3c v3a/v3b "d" "a" "b" "a" "d" "b" 462 461 459 458 460 454 453 455 456 457 452 1 2 3 4 5 6 7 8 9 10 15 18 462 461 459 460 458 456 457 455 453 454 452 1 2 3 4 5 6 7 8 9 10 15 18 186 189 190 193 1053 1050 1055 1052 1046 186 189 190 188 191 192 1049 1050 1053 188 191 192 195 1048 1051 1052 1055 ccd out
? 40 ? ICX274AL drive timing chart (vertical sync) center scan mode (2)/(36mhz) note) the 581h horizontal period is 601clk. hd v1 vd v2c v2a/v2b v4 v3c v3a/v3b "d" "a" "b" "a" "b" "d" 581 580 578 577 576 579 1 2 3 4 5 6 7 8 9 10 581 580 578 579 577 576 1 2 3 4 5 6 7 8 9 10 58 53 54 57 60 55 56 59 1188 1183 1187 1184 53 54 57 58 55 56 59 60 1183 1184 1187 1188 1186 1181 1185 1182 1181 1182 1185 1186 ccd out
? 41 ? ICX274AL drive timing chart (vertical sync) center scan mode (2) "a" enlarged h1a/h1b v1 v2c v2a/v2b v3c v3a/v3b v4 18 54 18 18 18 18 18 18 18 18 18 18 18 18 18 18 54 150 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 66 600 750
? 42 ? ICX274AL drive timing chart (vertical sync) center scan mode (2)/(28.6mhz) "b" enlarged h1a/h1b v1 v2c v2a/v2b v3c v3a/v3b v4 18 18 18 18 18 18 18 18 # (3 + 5) # (4 + 6) # (185 + 187) 18 18 18 18 18 18 18 18 27936 bits 28980 bits = 14h
? 43 ? ICX274AL drive timing chart (vertical sync) center scan mode (2)/(36mhz) "b" enlarged h1a/h1b v1 v2c v2a/v2b v3c v3a/v3b v4 18 18 18 18 18 18 18 18 # (3 + 5) # (4 + 6) # (50 + 52) 18 18 18 18 18 18 18 18 8784 bits 10350 bits = 5h
? 44 ? ICX274AL drive timing chart (horizontal sync) center scan modes (1) and (2) rg clk shp shd h1a/h1b h2a/h2b 1 2070 1521 112 128 354 446 14 v1 v2a/v2b/v2c v3a/v3b/v3c v4 sub 154 1 90 1 90 18 1 1 1 1 1 1 54 90 1 1 54 138 54 1 154 154 90 1 102 1901 154 1 36 1 84 120 90 1 1 12 60 282
? 45 ? ICX274AL drive timing chart (vertical sync) center scan modes (1) and (2)/(28.6mhz) "d" enlarged h1a/h1b 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 #2 #1 #3 #222 16560 bits 1 v1 v2c v2a/v2b v3c v3a/v3b v4
? 46 ? ICX274AL drive timing chart (vertical sync) center scan modes (1) and (2)/(36mhz) "d" enlarged h1a/h1b 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 #2 #1 #3 #63 6210 bits 1 v1 v2c v2a/v2b v3c v3a/v3b v4
? 47 ? ICX274AL drive timing chart (vertical sync) center scan mode (3)/(28.6mhz) hd v1 vd v2 v4 v3 478 479 497 496 "a" "d" "b" "a" "b" "d" 498 1 2 3 4 5 6 32 33 34 35 478 479 497 496 498 1 2 3 4 5 6 32 33 34 35 839 397 398 840 839 397 398 840 ccd out note) the 498h horizontal period is 1260clk.
? 48 ? ICX274AL drive timing chart (vertical sync) center scan mode (3)/(36mhz) hd v1 vd v2 v4 v3 609 610 625 624 "a" "d" "b" "a" "b" "d" 626 1 2 3 4 5 6 27 28 29 30 31 609 610 625 624 626 1 2 3 4 5 6 27 28 29 30 907 329 330 908 907 329 330 908 ccd out note) the 626h horizontal period is 1200clk.
? 49 ? ICX274AL drive timing chart (horizontal sync) center scan mode (3) rg clk shp shd h1a/h1b h2a/h2b 1 1920 1521 112 128 204 296 14 v1 v2a/v2b/v2c v3a/v3b/v3c v4 sub 1 90 18 1 54 1 54 1 154 1 90 1 36 1 9 1 78 114 96 132 60 135 1 1 1 1 1
? 50 ? ICX274AL drive timing chart (vertical sync) center scan mode (3) "a" enlarged h1a/h1b v1 v2a/v2b/v2c v3a/v3b/v3c v4 18 18 18 18 18 18 18 18 60 18 18 18 18 18 1100 1250
? 51 ? ICX274AL drive timing chart (vertical sync) center scan mode (3)/(28.6mhz) "b" enlarged h1a/h1b v1 v2c v2a/v2b v3c v3a/v3b v4 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 58608 bits 59520 bits = 31h
? 52 ? ICX274AL drive timing chart (vertical sync) center scan mode (3)/(36mhz) "b" enlarged h1a/h1b v1 v2c v2a/v2b v3c v3a/v3b v4 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 48816 bits 49920 bits = 26h
? 53 ? ICX274AL drive timing chart (vertical sync) center scan mode (3)/(28.6mhz) "d" enlarged h1a/h1b 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 #2 #1 #3 #398 34560 bits 1 v1 v2c v2a/v2b v3c v3a/v3b v4
? 54 ? ICX274AL drive timing chart (vertical sync) center scan mode (3)/(36mhz) "d" enlarged h1a/h1b 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 #2 #1 #3 #330 28800 bits 1 v1 v2c v2a/v2b v3c v3a/v3b v4
? 55 ? ICX274AL drive timing chart (vertical sync) af mode (1)/(28.6mhz) hd v1 vd v2a v2b/v2c v4 ccd out v3a v3b/v3c "a" "b" "d" "a" "d" "b" 204 203 202 201 191 190 1 2 3 4 5 6 7 8 19 20 21 22 204 203 202 201 191 190 1 2 3 4 5 6 7 8 9 19 20 21 22 286 289 958 953 286 289 958 953 note) the 203 and 204h horizontal periods are 1323clk.
? 56 ? ICX274AL drive timing chart (vertical sync) af mode (1)/(36mhz) hd v1 vd v2a v2b/v2c v4 ccd out v3a v3b/v3c "a" "b" "d" "a" "d" "b" 256 255 254 249 248 1 2 3 4 5 6 7 8 9 11 10 12 13 14 256 255 254 249 248 1 2 3 4 5 6 7 8 9 10 11 12 13 14 153 158 1089 1086 153 158 1089 1086 note) the 256h horizontal period is 840clk.
? 57 ? ICX274AL drive timing chart (vertical sync) af mode (1)/(28.6mhz) "b" enlarged h1a/h1b v1 v2c v2a/v2b v3c v3a/v3b v4 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 41904 bits 42336 bits = 18h
? 58 ? ICX274AL drive timing chart (vertical sync) af mode (1)/(36mhz) "b" enlarged h1a/h1b v1 v2c v2a/v2b v3c v3a/v3b v4 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 22896 bits 23520 bits = 10h
? 59 ? ICX274AL drive timing chart (vertical sync) af mode (1)/(28.6mhz) "d" enlarged h1a/h1b 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 #2 #1 #3 #339 25872 bits 1 v1 v2c v2a/v2b v3c v3a/v3b v4
? 60 ? ICX274AL drive timing chart (vertical sync) af mode (1)/(36mhz) "d" enlarged h1a/h1b 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 #2 #1 #3 #180 14112 bits 1 v1 v2c v2a/v2b v3c v3a/v3b v4
? 61 ? ICX274AL drive timing chart (vertical sync) af mode (2)/(28.6mhz) hd v1 vd v2a v2b/v2c v4 ccd out v3a v3b/v3c "a" "b" "d" "a" "d" "b" 102 101 100 80 81 1 2 3 4 5 6 7 8 9 35 36 37 38 102 101 100 80 81 1 2 3 4 5 6 7 8 9 35 36 37 38 537 542 702 705 537 542 702 705 note) the 102h horizontal period is 1323clk.
? 62 ? ICX274AL drive timing chart (vertical sync) af mode (2)/(36mhz) hd v1 vd v2a v2b/v2c v4 ccd out v3a v3b/v3c "a" "b" "d" "a" "d" "b" 128 127 126 108 109 1 2 3 4 5 6 7 8 9 31 32 33 34 128 127 126 108 109 1 2 3 4 5 6 7 8 9 31 32 33 34 473 478 766 769 473 478 766 769 note) the 128h horizontal period is 1596clk.
? 63 ? ICX274AL drive timing chart (vertical sync) af mode (2)/(28.6mhz) "b" enlarged h1a/h1b v1 v2c v2a/v2b v3c v3a/v3b v4 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 78192 bits 79968 bits = 34h
? 64 ? ICX274AL drive timing chart (vertical sync) af mode (2)/(36mhz) "b" enlarged h1a/h1b v1 v2c v2a/v2b v3c v3a/v3b v4 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 68976 bits 70560 bits = 30h
? 65 ? ICX274AL drive timing chart (vertical sync) af mode (2)/(28.6mhz) "d" enlarged h1a/h1b 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 #2 #1 #3 #640 47040 bits 1 v1 v2c v2a/v2b v3c v3a/v3b v4
? 66 ? ICX274AL drive timing chart (vertical sync) af mode (2)/(36mhz) "d" enlarged h1a/h1b 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 #2 #1 #3 #564 42336 bits 1 v1 v2c v2a/v2b v3c v3a/v3b v4
? 67 ? ICX274AL drive timing chart (horizontal sync) af modes (1) and (2) rg v1 v2a v2b/v2c v3a v3b/v3c v4 sub clk shp shd h1a/h1b h2a/h2b 154 1 1 190 18 1 90 1 90 1 72 54 154 154 1 60 154 1 154154154154 90 190 19011 60 36 154 1 154154154154 90 190 19011 60 36 190 1 154154154154 90 190 190 1 60 190 1 154154154154 90 190 190 1 60 190 1 154 1 1 36 1 54 1 54 1 118 90 190 190 60 1 19 60 567 1 2352 1521 112 128 636 728 14
? 68 ? ICX274AL drive timing chart (vertical sync) af modes (1) and (2) "a" enlarged h1a/h1b v1 v2a v2b/v2c v3a v3b/v3c v4 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 42 1100 1250 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 60 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18
? 69 ? ICX274AL notes of handling 1) static charge prevention ccd image sensors are easily damaged by static discharge. before handling be sure to take the following protective measures. a) either handle bare handed or use non-chargeable gloves, clothes or material. also use conductive shoes. b) when handling directly use an earth band. c) install a conductive mat on the floor or working table to prevent the generation of static electricity. d) ionized air is recommended for discharge when handling ccd image sensors. e) for the shipment of mounted substrates, use boxes treated for the prevention of static charges. 2) soldering a) make sure the package temperature does not exceed 80 c. b) solder dipping in a mounting furnace causes damage to the glass and other defects. use a ground 30w soldering iron and solder each pin in less than 2 seconds. for repairs and remount, cool sufficiently. c) to dismount an image sensor, do not use a solder suction equipment. when using an electric desoldering tool, use a thermal controller of the zero-cross on/off type and connect it to ground. 3) dust and dirt protection image sensors are packed and delivered by taking care of protecting its glass plates from harmful dust and dirt. clean glass plates with the following operations as required, and use them. a) perform all assembly operations in a clean room (class 1000 or less). b) do not either touch glass plates by hand or have any object come in contact with glass surfaces. should dirt stick to a glass surface, blow it off with an air blower. (for dirt stuck through static electricity ionized air is recommended.) c) clean with a cotton bud and ethyl alcohol if grease stained. be careful not to scratch the glass. d) keep in a case to protect from dust and dirt. to prevent dew condensation, preheat or precool when moving to a room with great temperature differences. e) when a protective tape is applied before shipping, just before use remove the tape applied for electrostatic protection. do not reuse the tape. 4) installing (attaching) a) remain within the following limits when applying a static load to the package. do not apply any load more than 0.7mm inside the outer perimeter of the glass portion, and do not apply any load or impact to limited portions. (this may cause cracks in the package.) b) if a load is applied to the entire surface by a hard component, bending stress may be generated and the package may fracture, etc., depending on the flatness of the bottom of the package. therefore, for installation, use either an elastic load, such as a spring plate, or an adhesive. plastic package cover glass compressive strength 50n 50n 1.2nm torsional strength
? 70 ? ICX274AL c) the adhesive may cause the marking on the rear surface to disappear, especially in case the regulated voltage value is indicated on the rear surface. therefore, the adhesive should not be applied to this area, and indicated values should be transferred to other locations as a precaution. d) the notch of the package is used for directional index, and that can not be used for reference of fixing. in addition, the cover glass and seal resin may overlap with the notch of the package. e) if the leads are bent repeatedly and metal, etc., clash or rub against the package, the dust may be generated by the fragments of resin. f) acrylate anaerobic adhesives are generally used to attach ccd image sensors. in addition, cyano- acrylate instantaneous adhesives are sometimes used jointly with acrylate anaerobic adhesives. (reference) 5) others a) do not expose to strong light (sun rays) for long periods. for continuous using under cruel condition exceeding the normal using condition, consult our company. b) exposure to high temperature or humidity will affect the characteristics. accordingly avoid storage or usage in such conditions. c) brown stains may be seen on the bottom or side of the package. but this does not affect the ccd characteristics. d) this package has 2 kinds of internal structure. however, their package outline, optical size, and strength are the same. the cross section of lead frame can be seen on the side of the package for structure a. structure a structure b chip metal plate (lead frame) package cross section of lead frame
? 71 ? ICX274AL sony corporation 20 pin dip b ~ b ' m a 1 1 c h v d 12.2 package structure package material lead treatment lead material package mass drawing number plastic gold plating 42 alloy as-b6-02(e) 0.95g 1. ?a? is the center of the effective image area. 2. the two points ?b? of the package are the horizontal reference. the point ?b'? of the package is the vertical reference. 3. the bottom ?c? of the package, and the top of the cover glass ?d? are the height reference. 4. the center of the effective image area relative to ?b? and ?b'? is (h, v) = (6.9, 6.0) ?0.075mm. 5. the rotation angle of the effective image area relative to h and v is ?1?. 6. the height from the bottom ?c? to the effective image area is 1.41 ?0.10mm. the height from the top of the cover glass ?d? to the effective image area is 1.49 ?0.15mm. 7. the tilt of the effective image area relative to the bottom ?c? is less than 50?. the tilt of the effective image area relative to the top ?d? of the cover glass is less than 50?. 8. the thickness of the cover glass is 0.5mm, and the refractive index is 1.5. 9. the notches on the bottom of the package are used only for directional index, they must not be used for reference of fixing. ~ ~ 0.25 1.7 1.7 1.7 11 20 1.7 10 12.0 ?0.1 2.9 ?0.15 3.5 ?0.3 13.8 ?0.1 12.7 10 20 11 6.9 10.9 0? to 9? 6.0 2.4 0.5 0.8 2.5 9.0 2.5 0.5 0.8 1.27 0.3 0.3 10.0 2.5 package outline unit: mm

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